Unlock next-gen hardware performance secrets for your HPC codes
Wednesday 18 May 2016 at 9h00
Conference Cerfacs
Register to : Nicolas.Monnier@cerfacs.fr
“Unlock next-gen hardware performance secrets for your HPC codes; enable SIMD AVX/AVX-512 vector parallelism with Intel code modernization tool »
Abstract:
Software must be optimized for SIMD vector parallelism to achieve scaled performance on modern hardware. The gap between unoptimized baseline and SIMD+thread parallel code performance is increasing every year. SIMD code modernization is not without cost, but new capabilities of OpenMP 4.x “explicit vectorization” and new Intel® “Vectorization Advisor” software tool make it possible to introduce efficient and portable SIMD parallelism without disrupting ongoing development. Even with perfect vectorization developers often have to additionally balance CPU/vectors/thread utilization vs. memory sub-system data bottlenecks. This problem is also addressed with new experimental Intel Advisor 2017 capabilities (like Automated Roofline).
Speaker Bio:
Zakhar A. Matveev, PhD, is a Parallel Studio product architect in Intel SSG group. His current focus is SIMD vector parallelism and memory assistance tools. His professional interests are in the areas of high performance computing, parallel programming, computer graphics, code modernization, software design and usability.
No content defined in the sidebar.
